IEC 63011-1:2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
OVERVIEW
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
COMMENTS
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PRODUCT DETAILS
| Status | Current |
|---|---|
| Edition | 2018 |
| No. of Pages | 24 |
| ICS Classification | 31.200 Integrated circuits. Microelectronics |
| Committee | TC 47/SC 47A |
| Available for Purchase | For sale in Singapore only |
| Adoption | IEC |